{"id":17590,"date":"2023-02-22T12:00:00","date_gmt":"2023-02-22T11:00:00","guid":{"rendered":"https:\/\/newsite.finki.ukim.mk\/announcements\/otvoren-povik-za-trening-programa-na-it-labs-za-dizajniranje-na-chipovi-so-hdl\/"},"modified":"2023-02-22T12:00:00","modified_gmt":"2023-02-22T11:00:00","slug":"otvoren-povik-za-trening-programa-na-it-labs-za-dizajniranje-na-chipovi-so-hdl","status":"publish","type":"announcement","link":"https:\/\/finki.ukim.mk\/en\/announcements\/otvoren-povik-za-trening-programa-na-it-labs-za-dizajniranje-na-chipovi-so-hdl\/","title":{"rendered":"Open Call for IT Labs Training Program on HDL Chip Design"},"content":{"rendered":"<p>What<span>\u00a0\u0435 <\/span><span>included<\/span>\u00a0<span>in<\/span>\u00a0<span>the program<\/span><span>?<\/span>\u00a0<\/p>\n<p><span>This<\/span>\u00a0is a training program that aims to explain how<span>\u00a0are being designed<\/span><span>\u00a0modern<\/span><span>you<\/span><span>\u00a0computer<\/span>\u00a0systems<span>\u00a0at the lowest level and what are the specifics of this <\/span>methodology<span>. <\/span>This technology is available everywhere in the world, but<span>\u00a0much less <\/span>in our parts. B<span>Oh, IT Labs <\/span>Our focus is on building a team of highly qualified engineers who will be experts in the field of creating and developing digital systems using HDL (Hardware Description Language) on different types of silicon<span>and<\/span><span>\u00a0architect<\/span>tours like<span>\u00a0for example:<\/span><span>\u00a0CPLD, FPGA, and <\/span>potentially ASIC. With support from\u00a0<span>our<\/span>them <span>colleagues<\/span>\u00a0and partners, IT Labs has developed\u00a0<span>educational <\/span><span>plan<\/span>\u00a0and a program through which participants will acquire the knowledge and skills needed to design and verify concepts developed with HDL. The training program includes work on practical examples, projects, and <span>acquisition of <\/span><span>experience<\/span>\u00a0with\u00a0<span>use of <\/span><span>FPGA and CPLD <\/span>chipsets that will be configured to perform different types of data and signal processing.<\/p>\n<p><span><span>Designing<\/span>\u00a0<span>on<\/span>\u00a0<span>Chips<\/span>\u00a0<span>with<\/span><span>\u00a0High-density lipoprotein<\/span><\/span>\u00a0<\/p>\n<p><span>This<\/span>\u00a0The methodology is intended for designing complex\u00a0<span>specific <\/span><span>digital<\/span>\u00a0systems<span>\u00a0which cannot be obtained in any other way<\/span>. Modeling is performed with <span>use<\/span>\u00a0in languages\u00a0<span>to us<\/span>genetic <span>for<\/span>\u00a0textually\u00a0<span>description <\/span><span>which<\/span>\u00a0\u0433<span>and define <\/span><span>the processes<\/span>\u00a0and <span>processing <\/span>which is performed with <span>digital<\/span><span>you<\/span>\u00a0<span>components<\/span>, which build the complex system<span>. <\/span>The HDL syntax used in this training program will be VHDL (Very High-Speed Integrated Circuit Hardware Description Language), and the target architectures will be CPLD and FPGA.<\/p>\n<p><span><span>For<\/span>\u00a0<span>whom<\/span><span>\u00a0\u0435 <\/span><span>intended<\/span>\u00a0<span>this<\/span>\u00a0<span>training<\/span>\u00a0<span>program<\/span><span>?<\/span><\/span>\u00a0<\/p>\n<p><span>This<\/span>\u00a0The training program is intended for\u00a0<span>Students<\/span>to the technical faculties where electronics and computer science are studied, <span>and <\/span>persons with a degree in computer science and engineering (or related\u00a0<span>guidelines<\/span><span>).<\/span><\/p>\n<p><span><span>Prerequisites<\/span>\u00a0<span>for<\/span>\u00a0<span>the candidates<\/span><\/span>\u00a0<\/p>\n<p><span>Necessary<\/span>\u00a0Knowledge: <\/p>\n<ul>\n<li><span>Successfully<\/span>\u00a0Passed an exam in the fundamentals of electrical engineering or electronics <\/li>\n<li><span>Successfully<\/span>\u00a0Passed the Digital Electronics exam <\/li>\n<li><span>Excellent<\/span>\u00a0Knowledge of Programming, Algorithms, and Data Structures <\/li>\n<li><span>Basic<\/span>\u00a0Knowledge of Computer Systems and Architectures <\/li>\n<li><span>Basic<\/span>\u00a0Knowledge of nested systems <\/li>\n<\/ul>\n<p><span>Good<\/span>\u00a0For your information: <\/p>\n<ul>\n<li><span>Advanced<\/span>\u00a0Knowledge of electronics, microprocessor electronics, and modeling and simulation in electronics. <\/li>\n<li><span>Basic<\/span>\u00a0Knowledge of hardware modeling methods in VHDL <\/li>\n<li><span>Basic<\/span>\u00a0Knowledge of manufacturing electronic assemblies with digital electronic circuits. <\/li>\n<li><span>Basic<\/span>\u00a0Knowledge of microprocessor systems <\/li>\n<li><span>Basic<\/span>\u00a0Knowledge of developing software solutions in the C programming language or assembly language.\u00a0<\/li>\n<\/ul>\n<p><span><span>How<\/span>\u00a0<span>to<\/span>\u00a0<span>I find out<\/span>\u00a0<span>more<\/span>\u00a0<span>for<\/span>\u00a0<span>this<\/span>\u00a0<span>program<\/span><span>?<\/span><\/span>\u00a0<\/p>\n<p><span>In<\/span>\u00a0<strong><span>Thursday<\/span>, February 23, starting at 5 PM<\/strong><span>, <\/span>will be held\u00a0<strong><span>Online<\/span>\u00a0Open Day for the IT Labs Training Program on Chip Design with HDL<\/strong><span>, <\/span>at which Blagoy Kyupev, CIO at IT Labs, will present the program, the program's modules, and explain more about the technology.<span>\u00a0which <\/span>will be studied in this training<span>, <\/span>as well as the necessary skills and qualifications that candidates should possess in order to successfully complete the training program!\u00a0<\/p>\n<p><span>If you want<\/span>\u00a0To attend the open day, please register your attendance online at the following link:\u00a0<\/p>\n<p><a href=\"https:\/\/us02web.zoom.us\/webinar\/register\/WN_edNipSp-T6aPNJGRO4v5Qg\" rel=\"noopener noreferrer\" target=\"_blank\"><span><span>https:\/\/us02web.zoom.us\/webinar\/register\/WN_edNipSp-T6aPNJGRO4v5Qg<\/span><\/span><\/a><\/p>\n<p><span>For<\/span>\u00a0For all those who are unable to attend the online open house, it will be held.\u00a0<strong><span>Open<\/span>\u00a0day<\/strong><span>\u00a0for<\/span>\u00a0the same program, this time in\u00a0<strong><span>The Arena<\/span>\u00a0at IT Labs, on March 1, starting at 5 PM<\/strong><span>, <\/span>where once again, Blagoy Kyupev, CIO at IT Labs, will lead the program, which will have the same agenda as the online open day. This event will be in-person only.\u00a0<\/p>\n<p><span>If<\/span>\u00a0If you would like to attend, you need to register at the following link: <a href=\"https:\/\/www.eventbrite.ie\/e\/open-day-for-it-labs-chip-design-with-hdl-training-tickets-556596855177\" rel=\"noopener noreferrer\" target=\"_blank\"><span><span>https:\/\/www.eventbrite.ie\/e\/open-day-for-it-labs-chip-design-with-hdl-training-tickets-556596855177<\/span><\/span><\/a><\/p>\n<p><span><span>How<\/span>\u00a0<span>I can<\/span>\u00a0<span>to<\/span>\u00a0<span>I am applying for the program.<\/span><span>?<\/span><\/span>\u00a0<\/p>\n<p><span>Send<\/span>\u00a0Add your resume or short biography here: <a href=\"https:\/\/apply.workable.com\/it-labs1\/j\/AD65D8B917\/\" rel=\"noopener noreferrer\" target=\"_blank\"><span><span>https:\/\/apply.workable.com\/it-labs1\/j\/AD65D8B917\/<\/span><\/span><\/a>\u00a0<\/p>","protected":false},"featured_media":15124,"template":"","class_list":["post-17590","announcement","type-announcement","status-publish","has-post-thumbnail","hentry"],"_links":{"self":[{"href":"https:\/\/finki.ukim.mk\/en\/wp-json\/wp\/v2\/announcement\/17590","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/finki.ukim.mk\/en\/wp-json\/wp\/v2\/announcement"}],"about":[{"href":"https:\/\/finki.ukim.mk\/en\/wp-json\/wp\/v2\/types\/announcement"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/finki.ukim.mk\/en\/wp-json\/wp\/v2\/media\/15124"}],"wp:attachment":[{"href":"https:\/\/finki.ukim.mk\/en\/wp-json\/wp\/v2\/media?parent=17590"}],"curies":[{"name":"WordPress","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}