Subject

Digital circuit design

1. Course Title Digital circuit design
Digital circuit design
2. Code F23L2W041
3. Study Programme Computer engineering
4. Organizer of the study programme (unit, institute, department or division) Faculty of Computer Science and Engineering
5. Degree level (first, second, third cycle) First Cycle
6. Academic year / semester 1 / Winter
7. Number of ECTS credits 6
8. Teacher Saso Gramatikov
9. Prerequisites for enrolling in the course
10. Objectives of the course programme (competences) Familiarization with the basic methods for the analysis and design of logic circuits and logic networks, both combinational and sequential.
and sequential circuits, registers, and counters.
11. Course content Lectures:
1. Base-r number systems and conversions. Arithmetic operations in binary number systems.
2. Representation of signed numbers with complements (DC and RC complement). Arithmetic operations with complements.
3. Binary codes, weighting codes, BCD, Gray code. Error detection codes. Error correction codes (Hamming code)
4. Boolean algebra
5. Switching functions. Minterms and maxterms. Logic gates. Levels of integration.
6. Minimization of Boolean Functions with Karnaugh Maps and Quine-McCluskey
7. Analysis and design of combinational logic circuits
8. Multiplexers, demultiplexers, encoders, decoders, ROM and programmable logic arrays
9. Synchronous sequential circuits (flip-flops, latches)
10. Analysis of sequential circuits. State equations. State table. Millikan and Moore type sequential circuits.
11. Synthesis of sequential circuits. State coding. State minimization.
12. Registers. Parallel and serial loading. Shifting. Rotation.
13. Asynchronous and synchronous counters. Modulo counter. Ring counter. Johnson counter.

Practical Classes:
1. Base-r number systems and conversions. Arithmetic operations in binary number systems.
2. Representation of signed numbers with complements (DC and RC complement). Arithmetic operations with complements.
3. Binary codes, weighting codes, BCD, Gray code. Error detection codes. Error correction codes (Hamming code)
4. Boolean algebra
5. Switching functions. Minterms and maxterms. Logic gates. Levels of integration.
6. Minimization of Boolean Functions with Karnaugh Maps and Quine-McCluskey
7. Analysis and design of combinational logic circuits
8. Multiplexers, demultiplexers, encoders, decoders, ROM and programmable logic arrays
9. Synchronous sequential circuits (flip-flops, latches)
10. Analysis of sequential circuits. State equations. State table. Millikan and Moore type sequential circuits.
11. Synthesis of sequential circuits. State coding. State minimization.
12. Registers. Parallel and serial loading. Shifting. Rotation.
13. Asynchronous and synchronous counters. Modulo counter. Ring counter. Johnson counter.
12. Learning methods Lectures using presentations, interactive lectures, exercises (using equipment and software packages), teamwork, case studies, guest lectures, independent preparation and defense of a project assignment and a seminar paper.
13. Total available time 6 ECTS x 30 hours = 180 hours
14. Distribution of available time 30 + 45 + 15 + 15 + 75 = 180 hours
15. Forms of teaching activities
15.1. Lectures - theoretical instruction 30 hours
15.2. Exercises (laboratory, auditory), seminars, teamwork 45 hours
16. Other forms of activities
16.1. Project assignments 15 hours
16.2. Independent assignments 15 hours
16.3. Home study 75 hours
17. Assessment method
17.1. Tests 10 points
17.2. Seminar paper / project (presentation: written and oral) 15 points
17.3. Activities and learning 10 points
17.4. Final exam 70 points
18. Grading criteria (points / grade)
up to 50 points5 (five) (F)
from 51 to 60 points6 (six) (E)
from 61 to 70 points7 (seven) (D)
from 71 to 80 points8 (eight) (C)
from 81 to 90 points9 (nine) (B)
from 91 to 100 points10 (ten) (A)
19. Requirement for obtaining a signature and taking the final exam Activities 15.2 and 16.1 completed
20. Language of instruction Macedonian and English
21. Method for monitoring the quality of teaching internal evaluation and survey mechanism
22. Literature
22.1. Required literature
1. Morris Mano | Digital design, 5th edition | Pearson | 2013
2. Norman Balabanian | Principles of Digital Logic Design | Wiley | 2000
3. Edward J. McCluskey | Logic Design Principles | Prentice Hall | 1986
22.2. Additional literature
No. Author Title Publisher Year