Computer Architecture and Organization

Computer Architecture and Organization

1.

Subject title

Computer Architecture and Organization

Архитектура и организација на компјутери

2.

Code

F23L1S003

3.

Study program

Примена на информациски технологии, Софтверско инженерство и информациски системи, Компјутерски науки, Software engineering and information systems, Примена на информациски технологии, Софтверско инженерство и информациски системи, Компјутерски науки, Software engineering and information systems,

4.

Organizer of the study program (unit, institute, department, division)

Faculty of Information Sciences and Computer Engineering

5.

Study cycle (first, second, third)

Прв циклус

6.

Academic year / semester

1 / Летен

7. Number of ECTS credits

6.0

8.

Instructor

ворн. проф. д-р Александра Дединец проф. д-р Билјана Ристеска Стојкоска проф. д-р Дејан Спасов проф. д-р Игор Мишковски проф. д-р Љупчо Антовски проф. д-р Магдалена Костоска Ѓорчевска проф. д-р Марјан Гушев ворн. проф. д-р Мирослав Мирчев проф. д-р Сашо Граматиков ворн. проф. д-р Владимир Здравески

9.

Prerequisites for enrollment

10.

Subject goals and competencies:


Understanding of the main computer architectures, internal organization, performance assessment of individual parts and the computer system as a whole.

11.

Subject content:


Lectures: 1. Introduction, Computer Abstractions and Technologies 2. Performance and benchmarking 3. Instructions and operands, representation of different types of instructions, representation of integer and character operands 4. Program constructs in MIPS. Procedures 5. MIPS addressing. Translation and launch of programs 6. Computer arithmetic: Addition, subtraction, multiplication and division. Floating point numbers 7. Processor. MIPS implementation. Building a data path. 8. Building a control path. Introduction to Flow and Parallelism 9. Data and structural flow conflicts 10. Control flow conflicts. Interrupts and exceptions 11. Exploitation of the memory hierarchy and Cache Memory 12. Cache Memory and TLB Exercises: 1. Introduction and number systems, SM, RC, DC, Excess Code 2. Performance and benchmarking 3. Basic MIPS instructions. Representation of integer and signed operands 4. Program constructs in MIPS. Procedures 5. MIPS addressing 6. Computer Arithmetic. Floating point numbers 7. Fundamentals of Logic Design: Introduction, Gates, Truth Tables, Combinational Circuits, Introduction to HDL 8. Analogy of C code in MIPS Assembler 9. MIPS Assembler 10. Prediction of branching 11. Cache Memory and Performance 12. Cache Memory and Performance

12.

Learning methods:


Предавања поддржани со презентации преку слајдови, интерактивни предавања, вежби (користење на опрема и

13.

Total available time fund

6.0 ECTS x 30 hours = 180 hours

14.

Time distribution

30 + 45 + 15 + 15 + 75 = 180 hours

15.

Forms of teaching activities

15.1.

Lectures - theoretical teaching

30 hours

15.2.

Exercises (laboratory, classroom), seminars, team work

45 hours

16.

Other forms of activities

16.1.

Project tasks

15 hours

16.2.

Independent tasks

15 hours

16.3.

Homework

75 hours

17.

Grading method

17.1.

Tests

10 points

17.2.

Seminar work / project (presentation: written and oral)

15 points

17.3.

Activities and learning

10 points

17.4.

Final exam

70 points

18.

Grading criteria (points / grade)

up to 50 points

5 (five) (F)

from 51 to 60 points

6 (six) (E)

from 61 to 70 points

7 (seven) (D)

from 71 to 80 points

8 (eight) (C)

from 81 to 90 points

9 (nine) (B)

from 91 to 100 points

10 (ten) (A)

19.

Condition for signature and taking final exam

15.1 и 15.2

20.

Language of instruction

македонски и англиски

21.

Quality assurance method

механизам на интерна евалуација и анкети

22.

Literature

22.1.

Mandatory literature

No.

Author

Title

Publisher

Year

8537

Патерсон, Хенеси

Компјутерска организација и дизајн

Просветно дело, (Morgan Kaufmann)

2011

8538

Hennessy & Patterson

Computer Architecture: A Quantitative Approach 5th Edition

Morgan Kaufmann

2011

8539

Hennessy & Patterson

Computer Organization and Design MIPS Edition, 5th Edition: The Hardware/Software Interface

Morgan Kaufmann

2013

22.2.

Additional literature

No.

Author

Title

Publisher

Year